Latch circuits are common electrical circuits used in many different types of situations. Data latches are used commonly to latch or transfer a received data signal to an output of the latch as timed by a clock signal. Data latches are commonly used in logic circuitry such as flip-flops that can be of many different types of latch configurations including D-type latches and so forth.
Oftentimes a latch circuit is used in high speed switching circuitry. When a clocked latch circuit is used in high speed mixed signal circuitry, the delay of the latch can affect performance, especially if the delay is variable from one clock period to the next. Circuits operate to latch a data signal received at an input through the circuit when the clock signal is active. However, when the clock signal is inactive, a point within the circuit may be at a floating voltage, dependent upon the state of the input circuit. This floating node can be susceptible to coupling from other nodes of the circuit, such as the input, the clock signal and so forth. As a result of this floating node, there can be a data dependent delay before a correct output value is present at the output of the latch circuit. While in many circuits, this delay does not affect proper circuit operation, in certain high speeds circuits, such as when the data latch is used within a data converter, performance can be impacted. Also, if the delay is dependent on the data sequence being passed, the latch can cause noise and other distortion, as a delay in data transitions may cause a signal dependent error signal to be generated.